چنار کامپیوتر

4.7.4 [10] <§4.4> What is the latency of STUR? (Check your answer carefully.
Many students place extra muxes on the critical path.)

راه حل:

1. An instruction is fetched from the Instruction memory(I-Mem) = 250ps

2.1 Control Unit + ALU Control Unit = 100sp

2.2 The value of PC is added to the sign-extended, the result is the branch target address = 50ps

2.3 Adder calculate PC+4 (PC is incremented) = 150ps

2.4 19 bits of the instruction (offset) are shifted left by two (Single gate) = 5ps

2.5  Adder calculate PC+(shifted value) = 150ps

2.6 PC Register Read  = 30ps

3. MUX choose PC = 25ps

4. turn on Register file = 150ps

5. Sign extend value = 50ps

6. MUX choose sign-extended value = 25ps

7. The ALU computes the sum of the value read from the register file and the
Sign-extended 9 bits of the instruction (offset) = 200ps

8. Te sum from the ALU is used as the address for the data memory (D-Mem) = 250ps

منبع سوال: کتاب Computer Organization and Design ARM® EDITION